Capacitorless Dram Cell With Floating Junction Gate

Continuous improvements in the semiconductor industry have contributed to the down-scaling of electronics. Consequently, memory devices could be manufactured with lower spatial overhead required; bringing about improved performance and driving down the cost of memory devices (per bit). Typical dynamic random access memory (DRAM) circuitry requires one transistor and one capacitor for each bit of storage. Compared to static random access memory (SRAM), DRAM offers much greater density and thus reduced price. However, meeting the operating conditions has been a challenge when scaling below 50 nm. The challenges to produce adequate drive current (25 microA/m) and low off current (1 fA/micrometer) on capacitor-less DRAM have been widely researched.

An example of such technology being implemented is the floating junction gate random access memory (FJG RAM) developed by Oriental Semiconductor (Suzhou, China).

The circuitry behind the technology involves a floating gate n-type metal-oxide semiconductor (NMOS) transistor and a metal oxide semiconductor (MOS) gated diode. The floating gate NMOS transistor performs both the storage and transfer, with the floating gate acting providing charge storage mechanism. While other capacitor-less cells have been explored, the solution by Oriental Semiconductor has its advantages. The FJG approach provides fast read/write speed, requires a single bit-line and has a much simpler structure. Furthermore, the diode is integrated with the floating gate NMOS transistor, allowing a smaller size. According to the researchers, a size of 4-5F2 (four to five times of the feature size) can be achieved. With proper voltage levels, the "1s" need not be refreshed and the "0s" are found by simulation to be capable of being retained for 10 seconds in room temperature. Due to the non-destructive reading characteristics, bit-lines for "0s" refreshing could be shared by multiple cells, reducing overheads.

Apart from conventional DRAM devices, the technology could be utilized in embedded devices due to its superior logic process compatibility. In addition, the diode could be replaced by a photo-diode; converting the cell into an image sensor cell.

The patent to the technology has been granted to Oriental Semiconductor in July 2009, and it could impact manufacturers of DRAM and embedded systems by 2012, depending on its adoption.

Analyst Insights

In the memory segment, two key elements are cost and performance. FJG being able to address issues faced by DRAM, has the potential to be a technology capable of replacing DRAM. The technology, however, faces competition from other forms of volatile memory such as Twin Transistor RAM (TTRAM) developed by Renesas and zero capacitor RAM (Z-RAM), developed by Innovative Silicon Inc. and licensed to Hynix and AMD, with the latter being another form capacitor-less DRAM.

Increase in DRAM density has been helped by advancements in lithography improvements. These improvements are, however, expected to reduce in pace with extreme ultraviolet (EUV) only expected to be used for mass volume production by 2014. Prior to EUV, high-density circuits are likely to be fabricated by methodologies with lower throughput capabilities; resulting in increased cost. A change in cell design could possibly provide DRAM manufacturers with means of producing high-density memory using larger feature size. The technology, however, will require more results relating to smaller feature size.

Details:

Pang-Fei Wang

Researcher, Oriental Semiconductor Co. Ltd.

C2-201, No.218 XingHu Street

Nano-Science Park, Suzhou

Jiangsu, China 215123

Phone: +86-512-6253-4962

Email: peng-fei.wang@orientalsemi.com

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